diff options
-rw-r--r-- | include/kernel/kernel/cpu.h | 20 | ||||
-rw-r--r-- | include/kernel/lowio/gpio.h | 42 | ||||
-rw-r--r-- | nids/360/SceLowio.yml | 4 | ||||
-rw-r--r-- | nids/360/SceSyscon.yml | 1 | ||||
-rw-r--r-- | nids/360/SceSysmem.yml | 2 |
5 files changed, 69 insertions, 0 deletions
diff --git a/include/kernel/kernel/cpu.h b/include/kernel/kernel/cpu.h index 96f51fe..f7c4c52 100644 --- a/include/kernel/kernel/cpu.h +++ b/include/kernel/kernel/cpu.h @@ -200,6 +200,26 @@ int sceKernelCpuIcacheAndL2WritebackInvalidateRange(void *ptr, size_t len); */ int sceKernelCpuUnrestrictedMemcpy(void *dst, const void *src, size_t len); +/** + * @brief Suspend all interrupts (disables IRQs) + * + * @param[in] addr Mutex associated to the suspend-resume pair + * + * @return The current state of the interrupt controller, to be used with sceKernelCpuResumeIntr. + */ +int sceKernelCpuSuspendIntr(int *addr); + +/** + * @brief Resume all interrupts (enables IRQs) + * + * @param[in] addr Mutex associated to the suspend-resume pair + * @param[in] prev_state State obtained from sceKernelCpuSuspendIntr + * + * @return The previous state of the interrupt controller. + */ +int sceKernelCpuResumeIntr(int *addr, int prev_state); + + #ifdef __cplusplus } #endif diff --git a/include/kernel/lowio/gpio.h b/include/kernel/lowio/gpio.h new file mode 100644 index 0000000..2850494 --- /dev/null +++ b/include/kernel/lowio/gpio.h @@ -0,0 +1,42 @@ +#ifndef _PSP2_LOWIO_GPIO_H_ +#define _PSP2_LOWIO_GPIO_H_ + +#include <psp2/types.h> + +#ifdef __cplusplus +extern "C" { +#endif + +enum { + SCE_GPIO_ERROR_INVALID_BUS = 0x803F0100, + SCE_GPIO_ERROR_INVALID_PORT = 0x803F0101, + SCE_GPIO_ERROR_INVALID_MODE = 0x803F0102 +}; + +enum SceGpioPortMasks { + SCE_GPIO_PORT_MASK_LED_GAMECARD = 1 << 6, + SCE_GPIO_PORT_MASK_LED_PS_BUTTON = 1 << 7 +}; + +enum SceGpioPortMode { + SCE_GPIO_PORT_MODE_OUTPUT = 0, + SCE_GPIO_PORT_MODE_INPUT = 1 +}; + +int sceGpioPortRead(int bus, int port); +int sceGpioPortSet(int bus, int port); +int sceGpioPortClear(int bus, int port); +int sceGpioPortReset(int bus, int port); +int sceGpioSetPortMode(int bus, int port, int mode); +int sceGpioGetPortMode(int bus, int port); +int sceGpioSetIntrMode(int bus, int port, int intr_mode); +int sceGpioGetIntrMode(int bus, int port); +int sceGpioAcquireIntr(int bus, int port); +int sceGpioQueryIntr(int bus, int port); + +#ifdef __cplusplus +} +#endif + +#endif /* _PSP2_LOWIO_GPIO_H_ */ + diff --git a/nids/360/SceLowio.yml b/nids/360/SceLowio.yml index f72b70b..27e4321 100644 --- a/nids/360/SceLowio.yml +++ b/nids/360/SceLowio.yml @@ -6,7 +6,11 @@ modules: nid: 0xF0EF5743 functions: sceGpioAcquireIntr: 0x35AAD77A + sceGpioGetIntrMode: 0xE97A3B31 + sceGpioGetPortMode: 0xC4CB78E2 sceGpioPortClear: 0xF6310435 + sceGpioPortRead: 0x129DF5AC + sceGpioPortReset: 0xA1B5A462 sceGpioPortSet: 0xD454A584 sceGpioQueryIntr: 0x010DC295 sceGpioSetIntrMode: 0xBBEA1DDC diff --git a/nids/360/SceSyscon.yml b/nids/360/SceSyscon.yml index b1827b5..698b346 100644 --- a/nids/360/SceSyscon.yml +++ b/nids/360/SceSyscon.yml @@ -9,6 +9,7 @@ modules: sceSysconClearTemperatureLog: 0x3843D657 sceSysconCmdSync: 0x6E517D22 sceSysconCommitConfigstorageTransaction: 0x7B9B3617 + sceSysconCtrlLED: 0x04EC7579 sceSysconCtrlManualChargeMode: 0xC6A2C9EF sceSysconEnableHibernateIO: 0x4946538A sceSysconEndConfigstorageTransaction: 0xFCC3E8EE diff --git a/nids/360/SceSysmem.yml b/nids/360/SceSysmem.yml index 1196765..8bb7628 100644 --- a/nids/360/SceSysmem.yml +++ b/nids/360/SceSysmem.yml @@ -12,6 +12,8 @@ modules: sceKernelCpuDcacheWritebackRange: 0x9CB9F0CE sceKernelCpuDisableInterrupts: 0x821FC0EE sceKernelCpuEnableInterrupts: 0xF5BAD43B + sceKernelCpuResumeIntr: 0x7BB9D5DF + sceKernelCpuSuspendIntr: 0xD32ACE9E SceCpuForKernel: nid: 0x54BF2BAB functions: |