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-rw-r--r--lib/arm/assemble.h66
-rw-r--r--lib/arm/jump-patch.h11
-rw-r--r--lib/arm/misc.h3
-rw-r--r--lib/arm/transform-dis-arm-multi.inc.h41
4 files changed, 64 insertions, 57 deletions
diff --git a/lib/arm/assemble.h b/lib/arm/assemble.h
index 90f91c9..6f1e8e7 100644
--- a/lib/arm/assemble.h
+++ b/lib/arm/assemble.h
@@ -1,52 +1,57 @@
#pragma once
#include "dis.h"
-static inline void PUSHone(void **codep, int Rt) {
- if (codep->arch.pc_low_bit)
- op32(codep, 0x0d04f84d | Rt << 28);
+struct assemble_ctx {
+ void **codep;
+ bool thumb;
+};
+
+static inline void PUSHone(struct assemble_ctx ctx, int Rt) {
+ if (ctx.thumb)
+ op32(ctx.codep, 0x0d04f84d | Rt << 28);
else
- op32(codep, 0xe52d0004 | Rt << 12);
+ op32(ctx.codep, 0xe52d0004 | Rt << 12);
}
-static inline void POPone(void **codep, int Rt) {
- if (codep->arch.pc_low_bit)
- op32(codep, 0x0b04f85d | Rt << 28);
+static inline void POPone(struct assemble_ctx ctx, int Rt) {
+ if (ctx.thumb)
+ op32(ctx.codep, 0x0b04f85d | Rt << 28);
else
- op32(codep, 0xe49d0004 | Rt << 12);
+ op32(ctx.codep, 0xe49d0004 | Rt << 12);
}
-static inline void POPmulti(void **codep, uint16_t mask) {
- if (codep->arch.pc_low_bit)
- op32(codep, 0x0000e8bd | mask << 16);
+static inline void POPmulti(struct assemble_ctx ctx, uint16_t mask) {
+ if (ctx.thumb)
+ op32(ctx.codep, 0x0000e8bd | mask << 16);
else
- op32(codep, 0xe8bd0000 | mask);
+ op32(ctx.codep, 0xe8bd0000 | mask);
}
-static inline void MOVW_MOVT(void **codep, int Rd, uint32_t val) {
+static inline void MOVW_MOVT(struct assemble_ctx ctx, int Rd, uint32_t val) {
uint16_t hi = val >> 16, lo = (uint16_t) val;
- if (codep->arch.pc_low_bit) {
- op32(codep, 0x0000f240 | Rd << 24 | lo >> 12 | (lo >> 11 & 1) << 10 |
- (lo >> 8 & 7) << 28 | (lo & 0xff) << 16);
- op32(codep, 0x0000f2c0 | Rd << 24 | hi >> 12 | (hi >> 11 & 1) << 10 |
- (hi >> 8 & 7) << 28 | (hi & 0xff) << 16);
+ if (ctx.thumb) {
+ op32(ctx.codep, 0x0000f240 | Rd << 24 | lo >> 12 | (lo >> 11 & 1) << 10 |
+ (lo >> 8 & 7) << 28 | (lo & 0xff) << 16);
+ op32(ctx.codep, 0x0000f2c0 | Rd << 24 | hi >> 12 | (hi >> 11 & 1) << 10 |
+ (hi >> 8 & 7) << 28 | (hi & 0xff) << 16);
} else {
- op32(codep, 0xe3000000 | Rd << 12 | (lo >> 12) << 16 | (lo & 0xfff));
- op32(codep, 0xe3400000 | Rd << 12 | (hi >> 12) << 16 | (hi & 0xfff));
+ op32(ctx.codep, 0xe3000000 | Rd << 12 | (lo >> 12) << 16 | (lo & 0xfff));
+ op32(ctx.codep, 0xe3400000 | Rd << 12 | (hi >> 12) << 16 | (hi & 0xfff));
}
}
-static inline void STRri(void **codep, int Rt, int Rn, uint32_t off) {
- if (codep->arch.pc_low_bit)
- op32(codep, 0x0000f8c0 | Rn | Rt << 28 | off << 16);
+static inline void STRri(struct assemble_ctx ctx, int Rt, int Rn, uint32_t off) {
+ if (ctx.thumb)
+ op32(ctx.codep, 0x0000f8c0 | Rn | Rt << 28 | off << 16);
else
- op32(codep, 0xe4800000 | Rn << 16 | Rt << 12 | off);
+ op32(ctx.codep, 0xe4800000 | Rn << 16 | Rt << 12 | off);
}
-static inline void LDRxi(void **codep, int Rt, int Rn, uint32_t off,
+static inline void LDRxi(struct assemble_ctx ctx, int Rt, int Rn, uint32_t off,
enum pcrel_load_mode load_mode) {
- if (codep->arch.pc_low_bit) {
+ if (ctx.thumb) {
int subop, sign;
switch (load_mode) {
case PLM_U8: subop = 0; sign = 0; break;
@@ -56,7 +61,8 @@ static inline void LDRxi(void **codep, int Rt, int Rn, uint32_t off,
case PLM_U32: subop = 2; sign = 0; break;
default: __builtin_abort();
}
- op32(codep, 0x0000f890 | Rn | Rt << 28 | subop << 5 | sign << 8 | off << 16);
+ op32(ctx.codep, 0x0000f890 | Rn | Rt << 28 | subop << 5 | sign << 8 |
+ off << 16);
} else {
int is_byte, subop, not_ldrd;
switch (load_mode) {
@@ -67,11 +73,11 @@ static inline void LDRxi(void **codep, int Rt, int Rn, uint32_t off,
case PLM_U32: is_byte = 0; goto type1;
case PLM_U128: subop = 13; not_ldrd = 0; goto type2;
type1:
- op32(codep, 0xe5900000 | Rn << 16 | Rt << 12 | off);
+ op32(ctx.codep, 0xe5900000 | Rn << 16 | Rt << 12 | off);
break;
type2:
- op32(codep, 0xe1c00000 | Rn << 16 | Rt << 12 | subop << 4 |
- (off & 0xf) | (off & 0xf0) << 4 | not_ldrd << 20);
+ op32(ctx.codep, 0xe1c00000 | Rn << 16 | Rt << 12 | subop << 4 |
+ (off & 0xf) | (off & 0xf0) << 4 | not_ldrd << 20);
break;
default:
__builtin_abort();
diff --git a/lib/arm/jump-patch.h b/lib/arm/jump-patch.h
index b19e90f..238d56e 100644
--- a/lib/arm/jump-patch.h
+++ b/lib/arm/jump-patch.h
@@ -3,16 +3,19 @@
#define MAX_JUMP_PATCH_SIZE 8
#define MAX_REWRITTEN_SIZE (12 * 4) /* actually should be less */
-static inline int jump_patch_size(uintptr_t pc, uintptr_t dpc,
- struct arch_dis_ctx arch) {
+static inline int jump_patch_size(UNUSED uintptr_t pc,
+ UNUSED uintptr_t dpc,
+ UNUSED struct arch_dis_ctx arch,
+ UNUSED bool force) {
return 8;
}
-static inline void make_jump_patch(void **codep, uintptr_t pc, uintptr_t dpc,
+static inline void make_jump_patch(void **codep, UNUSED uintptr_t pc,
+ uintptr_t dpc,
struct arch_dis_ctx arch) {
if (arch.pc_low_bit)
op32(codep, 0xf000f8df);
else
op32(codep, 0xe51ff004);
- op32(codep, (uint32_t) pc);
+ op32(codep, (uint32_t) dpc);
}
diff --git a/lib/arm/misc.h b/lib/arm/misc.h
index 3dc9633..7ce1c05 100644
--- a/lib/arm/misc.h
+++ b/lib/arm/misc.h
@@ -12,6 +12,3 @@ enum { IS_LDRD_STRD = 1 << 16 };
#define JUMP_PATCH_SIZE 8
#define MAX_REWRITTEN_SIZE (12 * 4) /* actually should be less */
-static inline bool can_reach_with_jump_patch(uintptr_t pc, uintptr_t dpc) {
- return true;
-}
diff --git a/lib/arm/transform-dis-arm-multi.inc.h b/lib/arm/transform-dis-arm-multi.inc.h
index 001e613..2e6a62d 100644
--- a/lib/arm/transform-dis-arm-multi.inc.h
+++ b/lib/arm/transform-dis-arm-multi.inc.h
@@ -16,6 +16,7 @@ static NOINLINE UNUSED void transform_dis_data(struct transform_dis_ctx *ctx,
newval[3] = o3;
void **codep = ctx->rewritten_ptr_ptr;
+ struct assemble_ctx actx = {ctx->rewritten_ptr_ptr, ctx->arch.pc_low_bit};
/* A few cases:
* 1. Move to PC that does not read PC. Probably fine.
@@ -54,33 +55,33 @@ static NOINLINE UNUSED void transform_dis_data(struct transform_dis_ctx *ctx,
if (in_regs & 1 << 15)
return; /* case 1 */
/* case 2 */
- PUSHone(codep, scratch);
- PUSHone(codep, scratch);
- MOVW_MOVT(codep, scratch, pc);
+ PUSHone(actx, scratch);
+ PUSHone(actx, scratch);
+ MOVW_MOVT(actx, scratch, pc);
for (int i = 0; i < 4; i++)
if (newval[i] == 15)
newval[i] = scratch;
ctx->write_newop_here = *codep; *codep += ctx->op_size;
- STRri(codep, scratch, 13, 4);
- POPmulti(codep, 1 << scratch | 1 << 15);
+ STRri(actx, scratch, 13, 4);
+ POPmulti(actx, 1 << scratch | 1 << 15);
transform_dis_ret(ctx);
} else {
if (out_reg != -1 && !(in_regs & 1 << out_reg)) {
/* case 3 - ignore scratch */
- MOVW_MOVT(codep, out_reg, pc);
+ MOVW_MOVT(actx, out_reg, pc);
for (int i = 0; i < 4; i++)
if (newval[i] == 15)
newval[i] = out_reg;
ctx->write_newop_here = *codep; *codep += ctx->op_size;
} else {
/* case 4 */
- PUSHone(codep, scratch);
- MOVW_MOVT(codep, scratch, pc);
+ PUSHone(actx, scratch);
+ MOVW_MOVT(actx, scratch, pc);
for (int i = 0; i < 4; i++)
if (newval[i] == 15)
newval[i] = scratch;
- ctx->write_newop_here = *rpp; *rpp += ctx->op_size;
- POPone(codep, scratch);
+ ctx->write_newop_here = *codep; *codep += ctx->op_size;
+ POPone(actx, scratch);
}
}
ctx->modify = true;
@@ -97,20 +98,20 @@ static NOINLINE UNUSED void transform_dis_pcrel(struct transform_dis_ctx *ctx,
(void *) dpc, reg, load_mode);
#endif
ctx->write_newop_here = NULL;
- void **codep = ctx->rewritten_ptr_ptr;
+ struct assemble_ctx actx = {ctx->rewritten_ptr_ptr, ctx->arch.pc_low_bit};
if (reg == 15) {
int scratch = 0;
- PUSHone(codep, scratch);
- PUSHone(codep, scratch);
- MOVW_MOVT(codep, scratch, dpc);
+ PUSHone(actx, scratch);
+ PUSHone(actx, scratch);
+ MOVW_MOVT(actx, scratch, dpc);
if (load_mode != PLM_ADR)
- LDRxi(codep, scratch, scratch, 0, load_mode);
- STRri(codep, scratch, 13, 4);
- POPmulti(codep, 1 << scratch | 1 << 15);
- transform_dis_ret(codep);
+ LDRxi(actx, scratch, scratch, 0, load_mode);
+ STRri(actx, scratch, 13, 4);
+ POPmulti(actx, 1 << scratch | 1 << 15);
+ transform_dis_ret(ctx);
} else {
- MOVW_MOVT(codep, reg, dpc);
+ MOVW_MOVT(actx, reg, dpc);
if (load_mode != PLM_ADR)
- LDRxi(codep, reg, reg, 0, load_mode);
+ LDRxi(actx, reg, reg, 0, load_mode);
}
}
Copyright (C) 2019-2021 Reiko Asakura. All Rights Reserved.