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-rw-r--r--lib/arm64/arch-dis.h2
-rw-r--r--lib/arm64/arch-transform-dis.inc.h26
2 files changed, 15 insertions, 13 deletions
diff --git a/lib/arm64/arch-dis.h b/lib/arm64/arch-dis.h
index f91328b..2990f5a 100644
--- a/lib/arm64/arch-dis.h
+++ b/lib/arm64/arch-dis.h
@@ -4,7 +4,7 @@
struct arch_pcrel_info {
unsigned reg;
- enum pcrel_load_mode lm;
+ enum pcrel_load_mode load_mode;
};
struct arch_dis_ctx {
diff --git a/lib/arm64/arch-transform-dis.inc.h b/lib/arm64/arch-transform-dis.inc.h
index d8f831d..ac11e45 100644
--- a/lib/arm64/arch-transform-dis.inc.h
+++ b/lib/arm64/arch-transform-dis.inc.h
@@ -1,17 +1,17 @@
#include "arm64/assemble.h"
static NOINLINE UNUSED
-void transform_dis_pcrel(struct transform_dis_ctx *ctx, uint_tptr dpc, unsigned reg,
- enum pcrel_load_mode load_mode) {
+void transform_dis_pcrel(struct transform_dis_ctx *ctx, uint_tptr dpc,
+ struct arch_pcrel_info info) {
ctx->write_newop_here = NULL;
void **codep = ctx->rewritten_ptr_ptr;
- if (load_mode >= PLM_U32_SIMD) {
- int reg = arm64_get_unwritten_temp_reg(&ctx->arch);
+ if (info.load_mode >= PLM_U32_SIMD) {
+ int temp = arm64_get_unwritten_temp_reg(&ctx->arch);
MOVi64(codep, 0, dpc);
- LDRxi(codep, reg, 0, 0, true, load_mode);
+ LDRxi(codep, temp, 0, 0, true, info.load_mode);
} else {
- MOVi64(codep, reg, dpc);
- LDRxi(codep, reg, reg, 0, true, load_mode);
+ MOVi64(codep, info.reg, dpc);
+ LDRxi(codep, info.reg, info.reg, 0, true, info.load_mode);
}
}
@@ -19,7 +19,9 @@ static NOINLINE UNUSED
void transform_dis_branch(struct transform_dis_ctx *ctx, uint_tptr dpc, int cc) {
/* TODO fix BL */
#ifdef TRANSFORM_DIS_VERBOSE
- printf("transform_dis (%p): branch => %p\n", (void *) ctx->pc, (void *) dpc);
+ printf("transform_dis (0x%llx): branch => 0x%llx\n",
+ (unsigned long long) ctx->base.pc,
+ (unsigned long long) dpc);
#endif
if (dpc >= ctx->pc_patch_start && dpc < ctx->pc_patch_end) {
ctx->err = SUBSTITUTE_ERR_FUNC_BAD_INSN_AT_START;
@@ -33,9 +35,9 @@ void transform_dis_branch(struct transform_dis_ctx *ctx, uint_tptr dpc, int cc)
int icc = (cc & 0xf) ^ 1;
Bccrel(codep, icc, 4 + mov_br_size);
} else if ((cc & CC_XBXZ) == CC_XBXZ) {
- ctx->modify = true;
- ctx->newval[0] = ctx->pc + 4 + mov_br_size;
- ctx->newval[1] = 1; /* do invert */
+ ctx->base.modify = true;
+ ctx->base.newval[0] = ctx->base.pc + 4 + mov_br_size;
+ ctx->base.newval[1] = 1; /* do invert */
ctx->write_newop_here = *codep; *codep += 4;
}
int reg = arm64_get_unwritten_temp_reg(&ctx->arch);
@@ -45,7 +47,7 @@ void transform_dis_branch(struct transform_dis_ctx *ctx, uint_tptr dpc, int cc)
static void transform_dis_pre_dis(UNUSED struct transform_dis_ctx *ctx) {}
static void transform_dis_post_dis(struct transform_dis_ctx *ctx) {
- uint32_t op = ctx->op;
+ uint32_t op = ctx->base.op;
ctx->arch.regs_possibly_written |= op & 31;
ctx->arch.regs_possibly_written |= op >> 10 & 31;
ctx->arch.regs_possibly_written |= op >> 16 & 31;