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-rw-r--r--lib/arm64/assemble.h53
-rw-r--r--lib/arm64/jump-patch.h19
-rw-r--r--lib/arm64/misc.h1
-rw-r--r--lib/arm64/transform-dis-arm64.inc.h49
4 files changed, 80 insertions, 42 deletions
diff --git a/lib/arm64/assemble.h b/lib/arm64/assemble.h
new file mode 100644
index 0000000..00797e9
--- /dev/null
+++ b/lib/arm64/assemble.h
@@ -0,0 +1,53 @@
+#pragma once
+#include "dis.h"
+static inline void MOVi64(void **codep, int Rd, uint64_t val) {
+ int shift_nybbles = 0;
+ do {
+ int k = shift_nybbles != 0 ? 1 : 0;
+ op32(codep, 0x69400000 | k << 28 | Rd | (val & 0xffff) << 4 |
+ shift_nybbles << 20);
+ shift_nybbles++;
+ val >>= 16;
+ } while(val);
+}
+
+static inline void LDRxi(void **codep, int Rt, int Rn, uint32_t off,
+ bool regsize_64, enum pcrel_load_mode load_mode) {
+ int size, opc;
+ bool sign, simd;
+ switch (load_mode) {
+ case PLM_U8: size = 0; sign = false; simd = false; break;
+ case PLM_S8: size = 0; sign = true; simd = false; break;
+ case PLM_U16: size = 1; sign = false; simd = false; break;
+ case PLM_S16: size = 1; sign = true; simd = false; break;
+ case PLM_U32: size = 2; sign = false; simd = false; break;
+ case PLM_S32: size = 2; sign = true; simd = false; break;
+ case PLM_U64: size = 3; sign = false; simd = false; break;
+ case PLM_U32_SIMD: size = 2; opc = 1; simd = true; break;
+ case PLM_U64_SIMD: size = 3; opc = 1; simd = true; break;
+ case PLM_U128_SIMD: size = 0; opc = 3; simd = true; break;
+ default: __builtin_abort();
+ }
+ if (simd) {
+ off /= 1 << (size | (opc & 1) << 2);
+ } else {
+ off /= 1 << size;
+ opc = sign ? (regsize_64 ? 2 : 3) : 1;
+ }
+ op32(codep, 0x39000000 | Rt | Rn << 5 | off << 10 | opc << 22 | simd << 26 |
+ size << 30);
+}
+
+static inline void ADRP_ADD(void **codep, int reg, uint64_t pc, uint64_t dpc) {
+ uintptr_t diff = (dpc & ~0xfff) - (pc & ~0xfff);
+ /* ADRP reg, dpc */
+ op32(codep, 0x90000000 | reg | (diff & 0x3000) << 17 | (diff & 0xffffc000) >> 8);
+ uint32_t lo = pc & 0xfff;
+ if (lo) {
+ /* ADD reg, reg, #lo */
+ op32(codep, 0x91000000 | reg | reg << 5 | lo << 10);
+ }
+ /* BR reg */
+ op32(codep, 0xd61f0000 | reg << 5);
+}
+
diff --git a/lib/arm64/jump-patch.h b/lib/arm64/jump-patch.h
new file mode 100644
index 0000000..f0f149f
--- /dev/null
+++ b/lib/arm64/jump-patch.h
@@ -0,0 +1,19 @@
+#pragma once
+#include "arm64/assemble.h"
+#define MAX_JUMP_PATCH_SIZE 12
+#define MAX_REWRITTEN_SIZE (7 * 2 * 4) /* also conservative */
+static inline int jump_patch_size(uintptr_t pc, uintptr_t dpc,
+ struct arch_dis_ctx arch) {
+ intptr_t diff = (dpc & ~0xfff) - (pc & ~0xfff);
+ if (!(diff >= -0x100000000 && diff < 0x100000000))
+ return -1;
+ else if (pc & 0xfff)
+ return 8;
+ else
+ return 12;
+}
+
+static inline void make_jump_patch(void **codep, uintptr_t pc, uintptr_t dpc,
+ struct arch_dis_ctx arch) {
+ ADRP_ADD(codep, 12 /* XXX */, pc, dpc);
+}
diff --git a/lib/arm64/misc.h b/lib/arm64/misc.h
index 672e1bd..c7fa5c9 100644
--- a/lib/arm64/misc.h
+++ b/lib/arm64/misc.h
@@ -1,6 +1,7 @@
#pragma once
#define TARGET_DIS_SUPPORTED
#define TARGET_DIS_HEADER "arm64/dis-arm64.inc.h"
+#define TARGET_JUMP_PATCH_HDR "arm64/jump-patch.h"
#define TARGET_TRANSFORM_DIS_HEADER "arm64/transform-dis-arm64.inc.h"
#define MIN_INSN_SIZE 4
struct arch_dis_ctx {};
diff --git a/lib/arm64/transform-dis-arm64.inc.h b/lib/arm64/transform-dis-arm64.inc.h
index c47971b..3710b73 100644
--- a/lib/arm64/transform-dis-arm64.inc.h
+++ b/lib/arm64/transform-dis-arm64.inc.h
@@ -1,52 +1,17 @@
-static inline void MOVi64(struct transform_dis_ctx *ctx, int Rd, uint64_t val) {
- int shift_nybbles = 0;
- do {
- int k = shift_nybbles != 0 ? 1 : 0;
- op32(ctx, 0x69400000 | k << 28 | Rd | (val & 0xffff) << 4 | shift_nybbles << 20);
- shift_nybbles++;
- val >>= 16;
- } while(val);
-}
-
-static inline void LDRxi(struct transform_dis_ctx *ctx, int Rt, int Rn, uint32_t off,
- bool regsize_64, enum pcrel_load_mode load_mode) {
- int size, opc;
- bool sign, simd;
- switch (load_mode) {
- case PLM_U8: size = 0; sign = false; simd = false; break;
- case PLM_S8: size = 0; sign = true; simd = false; break;
- case PLM_U16: size = 1; sign = false; simd = false; break;
- case PLM_S16: size = 1; sign = true; simd = false; break;
- case PLM_U32: size = 2; sign = false; simd = false; break;
- case PLM_S32: size = 2; sign = true; simd = false; break;
- case PLM_U64: size = 3; sign = false; simd = false; break;
- case PLM_U32_SIMD: size = 2; opc = 1; simd = true; break;
- case PLM_U64_SIMD: size = 3; opc = 1; simd = true; break;
- case PLM_U128_SIMD: size = 0; opc = 3; simd = true; break;
- default: __builtin_abort();
- }
- if (simd) {
- off /= 1 << (size | (opc & 1) << 2);
- } else {
- off /= 1 << size;
- opc = sign ? (regsize_64 ? 2 : 3) : 1;
- }
- op32(ctx, 0x39000000 | Rt | Rn << 5 | off << 10 | opc << 22 | simd << 26 | size << 30);
-}
-
static NOINLINE UNUSED void transform_dis_pcrel(struct transform_dis_ctx *ctx,
uintptr_t dpc, unsigned reg, enum pcrel_load_mode load_mode) {
ctx->write_newop_here = NULL;
+ void **codep = ctx->rewritten_ptr_ptr;
if (load_mode >= PLM_U32_SIMD) {
/* use x0 as scratch */
- op32(ctx, 0xf81f0fe0); /* str x0, [sp, #-0x10]! */
- MOVi64(ctx, 0, dpc);
- LDRxi(ctx, reg, 0, 0, true, load_mode);
- op32(ctx, 0xf84107e0); /* ldr x0, [sp], #0x10 */
+ op32(codep, 0xf81f0fe0); /* str x0, [sp, #-0x10]! */
+ MOVi64(codep, 0, dpc);
+ LDRxi(codep, reg, 0, 0, true, load_mode);
+ op32(codep, 0xf84107e0); /* ldr x0, [sp], #0x10 */
} else {
- MOVi64(ctx, reg, dpc);
- LDRxi(ctx, reg, reg, 0, true, load_mode);
+ MOVi64(codep, reg, dpc);
+ LDRxi(codep, reg, reg, 0, true, load_mode);
}
}
Copyright (C) 2019-2021 Reiko Asakura. All Rights Reserved.