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Diffstat (limited to 'generated/generic-dis-arm.inc.h')
-rw-r--r--generated/generic-dis-arm.inc.h114
1 files changed, 73 insertions, 41 deletions
diff --git a/generated/generic-dis-arm.inc.h b/generated/generic-dis-arm.inc.h
index 88ce9ab..f98a869 100644
--- a/generated/generic-dis-arm.inc.h
+++ b/generated/generic-dis-arm.inc.h
@@ -1,5 +1,5 @@
/* Generated code; do not edit!
- generated by tables/gen.js from imaon2 '2b8112204067abe3d0643e23c2486656841ecafe-dirty'
+ generated by tables/gen.js from imaon2 'f0e220720bbfb8f8e00e76af56806a28fc8739a2'
https://github.com/comex/imaon2
arguments: '--gen-hook-disassembler -n _arm --dis-pattern=P(XXX) out/out-ARM.json'
(fair warning: at present the main (Rust) code in that repository is barely
@@ -13,6 +13,8 @@
/* GPR_Rn_so_reg_imm_shift_unk_Rd_1_ADDrsi: ADDrsi */
/* GPR_Rn_so_reg_reg_shift_unk_Rd_1_ADDrsr: ADDrsr */
/* adrlabel_label_unk_Rd_1_ADR: ADR */
+/* bl_target_func_2_BL: BL, BL_pred */
+/* GPR_func_3_BLX: BLX, BLX_pred, BXJ */
/* GPR_dst_B_2_BX: BX, BX_pred */
/* br_target_target_pred_p_B_1_Bcc: Bcc */
/* addr_offset_none_addr_unk_Rt_13_LDA: LDA, LDAB, LDAEX, LDAEXB, LDAEXD, LDAEXH, LDAH, LDREX, LDREXB, LDREXD, LDREXH, SWP, SWPB */
@@ -857,9 +859,11 @@
}
case 4:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
- case 5:
- case 7:
- return P(unidentified)(ctx);
+ case 5: {
+ insn_bl_target_func_2_BL:;
+ struct bitslice func = {.nruns = 1, .runs = (struct bitslice_run[]) {{0,0,24}}};
+ return P(bl_target_func_2_BL)(ctx, func); /* 0x0b000000 | 0xf0ffffff */
+ }
case 6: {
switch ((op >> 9) & 0x7) {
case 0:
@@ -880,6 +884,8 @@
}
}
}
+ case 7:
+ return P(unidentified)(ctx);
}
}
case 17:
@@ -924,10 +930,11 @@
}
}
case 2: {
- if ((op & 0xe100000) == 0x8100000) {
+ switch ((op >> 25) & 0x1) {
+ case 0:
goto insn_GPR_Rn_reglist_regs_16_LDMDA; /* 0x08100000 | 0xf1efffff */
- } else {
- return P(unidentified)(ctx);
+ case 1:
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
}
}
case 3: {
@@ -942,7 +949,7 @@
case 18: {
switch ((op >> 26) & 0x3) {
case 0: {
- switch ((op >> 5) & 0x3) {
+ switch ((op >> 5) & 0x7) {
case 0: {
if ((op & 0xffffff0) == 0x12fff10) {
struct bitslice dst = {.nruns = 1, .runs = (struct bitslice_run[]) {{0,0,4}}};
@@ -951,8 +958,20 @@
return P(unidentified)(ctx);
}
}
- case 1:
- case 3: {
+ case 1: {
+ if ((op & 0xfffffe0) == 0x12fff20) {
+ struct bitslice func = {.nruns = 1, .runs = (struct bitslice_run[]) {{0,0,4}}};
+ return P(GPR_func_3_BLX)(ctx, func); /* 0x012fff20 | 0xf000001f */
+ } else {
+ return P(unidentified)(ctx);
+ }
+ }
+ case 2:
+ case 3:
+ case 4:
+ return P(unidentified)(ctx);
+ case 5:
+ case 7: {
if ((op & 0xf3000b0) == 0x12000b0) {
insn_GPR_Rt_addrmode3_pre_addr_S_2_STRD_PRE:;
struct bitslice addr = {.nruns = 5, .runs = (struct bitslice_run[]) {{0,0,4}, {8,4,4}, {16,9,4}, {22,13,1}, {23,8,1}}};
@@ -962,7 +981,7 @@
return P(unidentified)(ctx);
}
}
- case 2: {
+ case 6: {
if ((op & 0xf2000f0) == 0x12000d0) {
insn_addrmode3_pre_addr_unk_Rt_4_LDRD_PRE:;
struct bitslice addr = {.nruns = 5, .runs = (struct bitslice_run[]) {{0,0,4}, {8,4,4}, {16,9,4}, {22,13,1}, {23,8,1}}};
@@ -995,10 +1014,11 @@
}
}
case 2: {
- if ((op & 0xe100000) == 0x8000000) {
+ switch ((op >> 25) & 0x1) {
+ case 0:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
- } else {
- return P(unidentified)(ctx);
+ case 1:
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
}
}
case 3: {
@@ -1054,10 +1074,11 @@
}
}
case 2: {
- if ((op & 0xe100000) == 0x8100000) {
+ switch ((op >> 25) & 0x1) {
+ case 0:
goto insn_GPR_Rn_reglist_regs_16_LDMDA; /* 0x08100000 | 0xf1efffff */
- } else {
- return P(unidentified)(ctx);
+ case 1:
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
}
}
case 3: {
@@ -1120,8 +1141,7 @@
case 4:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
case 5:
- case 7:
- return P(unidentified)(ctx);
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
case 6: {
switch ((op >> 9) & 0x7) {
case 0:
@@ -1136,6 +1156,8 @@
goto insn_addrmode5_addr_8_LDC2L_OFFSET; /* 0x0d000a00 | 0xf0cff1ff */
}
}
+ case 7:
+ return P(unidentified)(ctx);
}
}
case 22: {
@@ -1172,10 +1194,11 @@
}
}
case 2: {
- if ((op & 0xe100000) == 0x8000000) {
+ switch ((op >> 25) & 0x1) {
+ case 0:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
- } else {
- return P(unidentified)(ctx);
+ case 1:
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
}
}
case 3: {
@@ -1271,10 +1294,11 @@
}
}
case 2: {
- if ((op & 0xe100000) == 0x8000000) {
+ switch ((op >> 25) & 0x1) {
+ case 0:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
- } else {
- return P(unidentified)(ctx);
+ case 1:
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
}
}
case 3: {
@@ -1365,10 +1389,11 @@
}
}
case 2: {
- if ((op & 0xe100000) == 0x8100000) {
+ switch ((op >> 25) & 0x1) {
+ case 0:
goto insn_GPR_Rn_reglist_regs_16_LDMDA; /* 0x08100000 | 0xf1efffff */
- } else {
- return P(unidentified)(ctx);
+ case 1:
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
}
}
case 3: {
@@ -1487,10 +1512,11 @@
case 4:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
case 5:
- case 7:
- return P(unidentified)(ctx);
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
case 6:
goto insn_addrmode5_pre_addr_S_4_STC2L_PRE; /* 0x0d200000 | 0xf0cfffff */
+ case 7:
+ return P(unidentified)(ctx);
}
}
case 27: {
@@ -1591,10 +1617,11 @@
case 4:
goto insn_GPR_Rn_reglist_regs_16_LDMDA; /* 0x08100000 | 0xf1efffff */
case 5:
- case 7:
- return P(unidentified)(ctx);
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
case 6:
goto insn_addrmode5_pre_addr_4_LDC2L_PRE; /* 0x0d300000 | 0xf0cfffff */
+ case 7:
+ return P(unidentified)(ctx);
}
}
case 28: {
@@ -1674,10 +1701,11 @@
}
}
case 2: {
- if ((op & 0xe100000) == 0x8000000) {
+ switch ((op >> 25) & 0x1) {
+ case 0:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
- } else {
- return P(unidentified)(ctx);
+ case 1:
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
}
}
case 3: {
@@ -1783,10 +1811,11 @@
}
}
case 2: {
- if ((op & 0xe100000) == 0x8000000) {
+ switch ((op >> 25) & 0x1) {
+ case 0:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
- } else {
- return P(unidentified)(ctx);
+ case 1:
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
}
}
case 3: {
@@ -1875,10 +1904,11 @@
}
}
case 2: {
- if ((op & 0xe100000) == 0x8100000) {
+ switch ((op >> 25) & 0x1) {
+ case 0:
goto insn_GPR_Rn_reglist_regs_16_LDMDA; /* 0x08100000 | 0xf1efffff */
- } else {
- return P(unidentified)(ctx);
+ case 1:
+ goto insn_bl_target_func_2_BL; /* 0x0b000000 | 0xf0ffffff */
}
}
case 3: {
@@ -1915,6 +1945,7 @@ static INLINE tdis_ret P(GPR_Rt_addrmode_imm12_pre_addr_S_2_STRB_PRE_IMM)(struct
static INLINE tdis_ret P(GPR_Rt_ldst_so_reg_addr_S_2_STRB_PRE_REG)(struct bitslice ctx, struct bitslice addr, struct bitslice Rt) {}
static INLINE tdis_ret P(GPR_Rt_ldst_so_reg_shift_S_1_STRrs)(struct bitslice ctx, struct bitslice shift, struct bitslice Rt) {}
static INLINE tdis_ret P(GPR_dst_B_2_BX)(struct bitslice ctx, struct bitslice dst) {}
+static INLINE tdis_ret P(GPR_func_3_BLX)(struct bitslice ctx, struct bitslice func) {}
static INLINE tdis_ret P(GPRnopc_Rt_4_MCRR)(struct bitslice ctx, struct bitslice Rt) {}
static INLINE tdis_ret P(GPRnopc_Rt_addrmode_imm12_addr_S_1_STRBi12)(struct bitslice ctx, struct bitslice addr, struct bitslice Rt) {}
static INLINE tdis_ret P(GPRnopc_Rt_ldst_so_reg_shift_S_1_STRBrs)(struct bitslice ctx, struct bitslice shift, struct bitslice Rt) {}
@@ -1937,6 +1968,7 @@ static INLINE tdis_ret P(addrmode5_pre_addr_S_4_STC2L_PRE)(struct bitslice ctx,
static INLINE tdis_ret P(addrmode_imm12_addr_unk_Rt_2_LDRBi12)(struct bitslice ctx, struct bitslice addr, struct bitslice Rt) {}
static INLINE tdis_ret P(addrmode_imm12_pre_addr_unk_Rt_2_LDRB_PRE_IMM)(struct bitslice ctx, struct bitslice addr, struct bitslice Rt) {}
static INLINE tdis_ret P(adrlabel_label_unk_Rd_1_ADR)(struct bitslice ctx, struct bitslice label, struct bitslice Rd) {}
+static INLINE tdis_ret P(bl_target_func_2_BL)(struct bitslice ctx, struct bitslice func) {}
static INLINE tdis_ret P(br_target_target_pred_p_B_1_Bcc)(struct bitslice ctx, struct bitslice target, struct bitslice p) {}
static INLINE tdis_ret P(ldst_so_reg_addr_unk_Rt_2_LDRB_PRE_REG)(struct bitslice ctx, struct bitslice addr, struct bitslice Rt) {}
static INLINE tdis_ret P(ldst_so_reg_shift_unk_Rt_2_LDRBrs)(struct bitslice ctx, struct bitslice shift, struct bitslice Rt) {}
Copyright (C) 2019-2021 Reiko Asakura. All Rights Reserved.