Add unaligned read/write functions.

I thought I could get away without since I wasn't (presently) targeting
systems without hardware support for unaligned accesses, but on armv7
clang insists on optimizing into the one ARM instruction that requires
alignment anyway - LDM/STM.  Oops.  Damnit, clang.

4 files changed, 4 insertions, 4 deletions

diff --git a/lib/arm/dis-arm.inc.h b/lib/arm/dis-arm.inc.h
index ab61877..18285cd 100644
--- a/lib/arm/dis-arm.inc.h
+++ b/lib/arm/dis-arm.inc.h
@@ -215,7 +215,7 @@ static INLINE void P(bl_target_func_2_BL)(tdis_ctx ctx, struct bitslice func) {
 }
 
 static INLINE void P(dis_arm)(tdis_ctx ctx) {
-    uint32_t op = ctx->base.op = *(uint32_t *) ctx->base.ptr;
+    uint32_t op = ctx->base.op = unaligned_r32(ctx->base.ptr);
     ctx->base.op_size = ctx->base.newop_size = 4;
     #include "../generated/generic-dis-arm.inc.h"
     __builtin_abort();
diff --git a/lib/arm/dis-main.inc.h b/lib/arm/dis-main.inc.h
index c9fe983..0d87ba5 100644
--- a/lib/arm/dis-main.inc.h
+++ b/lib/arm/dis-main.inc.h
@@ -4,7 +4,7 @@
 
 static INLINE void P(dis)(tdis_ctx ctx) {
     if (ctx->arch.pc_low_bit) {
-        uint16_t op = *(uint16_t *) ctx->base.ptr;
+        uint16_t op = unaligned_r16(ctx->base.ptr);
         bool is_32 = (op >> 13 & 7) == 7 && (op >> 11 & 3) != 0;
         if (is_32)
             return P(dis_thumb2)(ctx);
diff --git a/lib/arm/dis-thumb.inc.h b/lib/arm/dis-thumb.inc.h
index 4f758bf..74ae71a 100644
--- a/lib/arm/dis-thumb.inc.h
+++ b/lib/arm/dis-thumb.inc.h
@@ -86,7 +86,7 @@ static INLINE void P(GPR_func_1_tBLXr)(tdis_ctx ctx, UNUSED struct bitslice func
 }
 
 static INLINE void P(thumb_do_it)(tdis_ctx ctx) {
-    uint16_t op = ctx->base.op = *(uint16_t *) ctx->base.ptr;
+    uint16_t op = ctx->base.op = unaligned_r16(ctx->base.ptr);
     #include "../generated/generic-dis-thumb.inc.h"
     __builtin_abort();
 }
diff --git a/lib/arm/dis-thumb2.inc.h b/lib/arm/dis-thumb2.inc.h
index 5f699c9..0a4c12c 100644
--- a/lib/arm/dis-thumb2.inc.h
+++ b/lib/arm/dis-thumb2.inc.h
@@ -196,7 +196,7 @@ static INLINE void P(thumb2_do_it)(tdis_ctx ctx) {
 }
 
 static INLINE void P(dis_thumb2)(tdis_ctx ctx) {
-    ctx->base.op = *(uint32_t *) ctx->base.ptr;
+    ctx->base.op = unaligned_r32(ctx->base.ptr);
     ctx->base.op_size = ctx->base.newop_size = 2;
     /* LLVM likes to think about Thumb2 instructions the way the ARM manual
      * does - 15..0 15..0 rather than 31..0 as actually laid out in memory... */