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author | comex | 2015-02-08 23:45:24 -0500 |
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committer | comex | 2015-02-08 23:45:24 -0500 |
commit | eb93cee2a22cde812ccd6b9bd418d36185c058f5 (patch) | |
tree | 43a22ccf021a1513dba3a9c99f7b81822fe950fa /lib/arm/misc.h | |
parent | formatting (diff) | |
download | substitute-eb93cee2a22cde812ccd6b9bd418d36185c058f5.tar.gz |
Refactor disassembly so x86 works, and add x86 transform-dis.
This patch is a monolithic mess, because I was too lazy to do the
refactor first (that would require some stash fun, since I wasn't
actually sure before doing x86 transform-dis what would be needed).
Anyway, the resulting code should be cleaner - less duplication.
This breaks ARM/ARM64.
Diffstat (limited to 'lib/arm/misc.h')
-rw-r--r-- | lib/arm/misc.h | 58 |
1 files changed, 1 insertions, 57 deletions
diff --git a/lib/arm/misc.h b/lib/arm/misc.h index ef11a05..c18367d 100644 --- a/lib/arm/misc.h +++ b/lib/arm/misc.h @@ -1,59 +1,3 @@ #pragma once +#define TARGET_POINTER_SIZE 4 #define TARGET_DIS_SUPPORTED -#define TARGET_DIS_HEADER "arm/dis-arm-multi.inc.h" -#define TARGET_JUMP_PATCH_HDR "arm/jump-patch.h" -#define TARGET_TRANSFORM_DIS_HEADER "arm/transform-dis-arm-multi.inc.h" -#define MIN_INSN_SIZE 2 -/* each input instruction might turn into: - * - 2 bytes for Bcc, if in IT - * then ONE of: - * - 2/4 bytes for just the instruction - * - 2+8 bytes for branch (which in *valid* code rules out IT but whatever) - * - up to 7 4-byte insns for pcrel (if dest=pc, and while these can be subject - * to IT, there can only reasonably be two per block, and if there are both - * then that's an unconditional exit - but we don't enforce any of this - * currently) - * - up to 7 4-byte insns for similar moves to PC that fall under 'data' - * the maximum number of possible inputs is 4, plus 4 extras if the last one - * was an IT (but in that case it can't be one of the above cases) - * while this looks huge, it's overly conservative and doesn't matter much, - * since only the actually used space will be taken up in the final output - */ -#define TD_MAX_REWRITTEN_SIZE (7*4*7 + 4) /* 196 */ - -struct arch_dis_ctx { - /* thumb? */ - bool pc_low_bit; - /* if thumb, IT cond for the next 5 instructions - * (5 because we still advance after IT) */ - uint8_t it_conds[5]; - /* for transform_dis - did we add space for a Bccrel? */ - uint8_t bccrel_bits; - void *bccrel_p; -}; - -static inline void arch_dis_ctx_init(struct arch_dis_ctx *ctx) { - ctx->pc_low_bit = false; - ctx->bccrel_p = NULL; - memset(ctx->it_conds, 0xe, 5); -} - -static inline void advance_it_cond(struct arch_dis_ctx *ctx) { - ctx->it_conds[0] = ctx->it_conds[1]; - ctx->it_conds[1] = ctx->it_conds[2]; - ctx->it_conds[2] = ctx->it_conds[3]; - ctx->it_conds[3] = ctx->it_conds[4]; - ctx->it_conds[4] = 0xe; -} - -#define DFLAG_IS_LDRD_STRD (1 << 16) - -/* Types of conditionals for 'branch' */ -/* a regular old branch-with-condition */ -#define CC_ARMCC (CC_CONDITIONAL | 0x400) -/* already in an IT block - in transform_dis this will be rewritten to a branch - * anyway, so it can be treated as unconditional; in jump_dis we have to know - * to keep going */ -#define CC_ALREADY_IN_IT (CC_CONDITIONAL | 0x800) -/* CBZ/CBNZ is rewritten */ -#define CC_CBXZ (CC_CONDITIONAL | 0xc00) |