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authorcomex2015-02-01 01:56:29 -0500
committercomex2015-02-01 01:56:42 -0500
commita23ef990492cd0384de1a924c44805587d5b5aed (patch)
treeaa3a28446fc1a7ca1d799c8f3ad3acc6afdea0f2 /generated
parenttrivial wording tweak (diff)
downloadsubstitute-a23ef990492cd0384de1a924c44805587d5b5aed.tar.gz
fix my utter failure to handle branches/conditionals correctly (on ARM)
Diffstat (limited to 'generated')
-rw-r--r--generated/generic-dis-arm.inc.h33
-rw-r--r--generated/generic-dis-arm64.inc.h2
-rw-r--r--generated/generic-dis-thumb.inc.h9
-rw-r--r--generated/generic-dis-thumb2.inc.h83
4 files changed, 65 insertions, 62 deletions
diff --git a/generated/generic-dis-arm.inc.h b/generated/generic-dis-arm.inc.h
index e312884..88ce9ab 100644
--- a/generated/generic-dis-arm.inc.h
+++ b/generated/generic-dis-arm.inc.h
@@ -1,5 +1,5 @@
/* Generated code; do not edit!
- generated by tables/gen.js from imaon2 '2b8112204067abe3d0643e23c2486656841ecafe'
+ generated by tables/gen.js from imaon2 '2b8112204067abe3d0643e23c2486656841ecafe-dirty'
https://github.com/comex/imaon2
arguments: '--gen-hook-disassembler -n _arm --dis-pattern=P(XXX) out/out-ARM.json'
(fair warning: at present the main (Rust) code in that repository is barely
@@ -14,7 +14,7 @@
/* GPR_Rn_so_reg_reg_shift_unk_Rd_1_ADDrsr: ADDrsr */
/* adrlabel_label_unk_Rd_1_ADR: ADR */
/* GPR_dst_B_2_BX: BX, BX_pred */
-/* br_target_target_B_1_Bcc: Bcc */
+/* br_target_target_pred_p_B_1_Bcc: Bcc */
/* addr_offset_none_addr_unk_Rt_13_LDA: LDA, LDAB, LDAEX, LDAEXB, LDAEXD, LDAEXH, LDAH, LDREX, LDREXB, LDREXD, LDREXH, SWP, SWPB */
/* addrmode5_addr_8_LDC2L_OFFSET: LDC2L_OFFSET, LDC2_OFFSET, LDCL_OFFSET, LDC_OFFSET, VLDRD, VLDRS, VSTRD, VSTRS */
/* addr_offset_none_addr_4_LDC2L_OPTION: LDC2L_OPTION, LDC2_OPTION, LDCL_OPTION, LDC_OPTION */
@@ -123,9 +123,10 @@
return P(GPR_Rn_reglist_regs_S_16_STMDA)(ctx, regs, Rn); /* 0x08000000 | 0xf1efffff */
}
case 5: {
- insn_br_target_target_B_1_Bcc:;
+ insn_br_target_target_pred_p_B_1_Bcc:;
struct bitslice target = {.nruns = 1, .runs = (struct bitslice_run[]) {{0,0,24}}};
- return P(br_target_target_B_1_Bcc)(ctx, target); /* 0x0a000000 | 0xf0ffffff */
+ struct bitslice p = {.nruns = 1, .runs = (struct bitslice_run[]) {{28,0,4}}};
+ return P(br_target_target_pred_p_B_1_Bcc)(ctx, target, p); /* 0x0a000000 | 0xf0ffffff */
}
case 6:
return P(unidentified)(ctx);
@@ -191,7 +192,7 @@
return P(GPR_Rn_reglist_regs_16_LDMDA)(ctx, regs, Rn); /* 0x08100000 | 0xf1efffff */
}
case 1:
- goto insn_br_target_target_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
+ goto insn_br_target_target_pred_p_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
}
}
case 3: {
@@ -232,7 +233,7 @@
case 4:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
case 5:
- goto insn_br_target_target_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
+ goto insn_br_target_target_pred_p_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
case 6: {
insn_addr_offset_none_addr_postidx_imm8s4_offset_S_4_STC2L_POST:;
struct bitslice offset = {.nruns = 2, .runs = (struct bitslice_run[]) {{0,0,8}, {23,8,1}}};
@@ -291,7 +292,7 @@
case 0:
goto insn_GPR_Rn_reglist_regs_16_LDMDA; /* 0x08100000 | 0xf1efffff */
case 1:
- goto insn_br_target_target_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
+ goto insn_br_target_target_pred_p_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
}
}
case 3: {
@@ -352,7 +353,7 @@
case 4:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
case 5:
- goto insn_br_target_target_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
+ goto insn_br_target_target_pred_p_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
case 6: {
if ((op & 0xff00fd0) == 0xc400b10) {
goto insn_GPR_Rt_4_MCR; /* 0x0c400b10 | 0xf00ff02f */
@@ -405,7 +406,7 @@
case 4:
goto insn_GPR_Rn_reglist_regs_16_LDMDA; /* 0x08100000 | 0xf1efffff */
case 5:
- goto insn_br_target_target_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
+ goto insn_br_target_target_pred_p_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
case 6: {
if ((op & 0xff00ed0) == 0xc500a10) {
goto insn_unk_Rt_13_MRC; /* 0x0c500a10 | 0xf00ff12f */
@@ -449,7 +450,7 @@
case 4:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
case 5:
- goto insn_br_target_target_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
+ goto insn_br_target_target_pred_p_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
case 6:
goto insn_addr_offset_none_addr_postidx_imm8s4_offset_S_4_STC2L_POST; /* 0x0c200000 | 0xf0cfffff */
case 7: {
@@ -504,7 +505,7 @@
case 0:
goto insn_GPR_Rn_reglist_regs_16_LDMDA; /* 0x08100000 | 0xf1efffff */
case 1:
- goto insn_br_target_target_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
+ goto insn_br_target_target_pred_p_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
}
}
case 3: {
@@ -609,7 +610,7 @@
case 4:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
case 5:
- goto insn_br_target_target_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
+ goto insn_br_target_target_pred_p_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
case 6: {
insn_addr_offset_none_addr_S_4_STC2L_OPTION:;
struct bitslice addr = {.nruns = 1, .runs = (struct bitslice_run[]) {{16,0,4}}};
@@ -674,7 +675,7 @@
case 4:
goto insn_GPR_Rn_reglist_regs_16_LDMDA; /* 0x08100000 | 0xf1efffff */
case 5:
- goto insn_br_target_target_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
+ goto insn_br_target_target_pred_p_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
case 6: {
insn_addr_offset_none_addr_4_LDC2L_OPTION:;
struct bitslice addr = {.nruns = 1, .runs = (struct bitslice_run[]) {{16,0,4}}};
@@ -728,7 +729,7 @@
case 4:
goto insn_GPR_Rn_reglist_regs_S_16_STMDA; /* 0x08000000 | 0xf1efffff */
case 5:
- goto insn_br_target_target_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
+ goto insn_br_target_target_pred_p_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
case 6:
goto insn_addr_offset_none_addr_S_4_STC2L_OPTION; /* 0x0c800000 | 0xf04fffff */
case 7: {
@@ -778,7 +779,7 @@
case 0:
goto insn_GPR_Rn_reglist_regs_16_LDMDA; /* 0x08100000 | 0xf1efffff */
case 1:
- goto insn_br_target_target_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
+ goto insn_br_target_target_pred_p_B_1_Bcc; /* 0x0a000000 | 0xf0ffffff */
}
}
case 3: {
@@ -1936,7 +1937,7 @@ static INLINE tdis_ret P(addrmode5_pre_addr_S_4_STC2L_PRE)(struct bitslice ctx,
static INLINE tdis_ret P(addrmode_imm12_addr_unk_Rt_2_LDRBi12)(struct bitslice ctx, struct bitslice addr, struct bitslice Rt) {}
static INLINE tdis_ret P(addrmode_imm12_pre_addr_unk_Rt_2_LDRB_PRE_IMM)(struct bitslice ctx, struct bitslice addr, struct bitslice Rt) {}
static INLINE tdis_ret P(adrlabel_label_unk_Rd_1_ADR)(struct bitslice ctx, struct bitslice label, struct bitslice Rd) {}
-static INLINE tdis_ret P(br_target_target_B_1_Bcc)(struct bitslice ctx, struct bitslice target) {}
+static INLINE tdis_ret P(br_target_target_pred_p_B_1_Bcc)(struct bitslice ctx, struct bitslice target, struct bitslice p) {}
static INLINE tdis_ret P(ldst_so_reg_addr_unk_Rt_2_LDRB_PRE_REG)(struct bitslice ctx, struct bitslice addr, struct bitslice Rt) {}
static INLINE tdis_ret P(ldst_so_reg_shift_unk_Rt_2_LDRBrs)(struct bitslice ctx, struct bitslice shift, struct bitslice Rt) {}
static INLINE tdis_ret P(tcGPR_Rm_unk_Rd_1_MOVr_TC)(struct bitslice ctx, struct bitslice Rm, struct bitslice Rd) {}
diff --git a/generated/generic-dis-arm64.inc.h b/generated/generic-dis-arm64.inc.h
index 9a2fb05..dd7f8a1 100644
--- a/generated/generic-dis-arm64.inc.h
+++ b/generated/generic-dis-arm64.inc.h
@@ -1,5 +1,5 @@
/* Generated code; do not edit!
- generated by tables/gen.js from imaon2 '2b8112204067abe3d0643e23c2486656841ecafe'
+ generated by tables/gen.js from imaon2 '2b8112204067abe3d0643e23c2486656841ecafe-dirty'
https://github.com/comex/imaon2
arguments: '--gen-hook-disassembler --dis-pattern=P(XXX) out/out-AArch64.json'
(fair warning: at present the main (Rust) code in that repository is barely
diff --git a/generated/generic-dis-thumb.inc.h b/generated/generic-dis-thumb.inc.h
index be5abb6..42c6c20 100644
--- a/generated/generic-dis-thumb.inc.h
+++ b/generated/generic-dis-thumb.inc.h
@@ -1,5 +1,5 @@
/* Generated code; do not edit!
- generated by tables/gen.js from imaon2 '2b8112204067abe3d0643e23c2486656841ecafe'
+ generated by tables/gen.js from imaon2 '2b8112204067abe3d0643e23c2486656841ecafe-dirty'
https://github.com/comex/imaon2
arguments: '--gen-hook-disassembler -n _thumb --dis-pattern=P(XXX) out/out-ARM.json'
(fair warning: at present the main (Rust) code in that repository is barely
@@ -15,7 +15,7 @@
/* t_adrlabel_addr_unk_Rd_1_tADR: tADR */
/* t_brtarget_target_B_1_tB: tB */
/* GPR_Rm_B_1_tBX: tBX */
-/* t_bcctarget_target_B_1_tBcc: tBcc */
+/* t_bcctarget_target_pred_p_B_1_tBcc: tBcc */
/* t_cbtarget_target_B_2_tCBNZ: tCBNZ, tCBZ */
/* tGPR_Rn_reglist_regs_1_tLDMIA: tLDMIA */
/* t_addrmode_pc_addr_unk_Rt_1_tLDRpci: tLDRpci */
@@ -164,7 +164,8 @@
case 15: {
if ((op & 0xfffff000) == 0xd000) {
struct bitslice target = {.nruns = 1, .runs = (struct bitslice_run[]) {{0,0,8}}};
- return P(t_bcctarget_target_B_1_tBcc)(ctx, target); /* 0x0000d000 | 0x00000fff */
+ struct bitslice p = {.nruns = 1, .runs = (struct bitslice_run[]) {{8,0,4}}};
+ return P(t_bcctarget_target_pred_p_B_1_tBcc)(ctx, target, p); /* 0x0000d000 | 0x00000fff */
} else {
return P(unidentified)(ctx);
}
@@ -248,7 +249,7 @@ static INLINE tdis_ret P(tGPR_Rn_reglist_regs_1_tLDMIA)(struct bitslice ctx, str
static INLINE tdis_ret P(tGPR_Rn_reglist_regs_S_1_tSTMIA_UPD)(struct bitslice ctx, struct bitslice regs, struct bitslice Rn) {}
static INLINE tdis_ret P(t_addrmode_pc_addr_unk_Rt_1_tLDRpci)(struct bitslice ctx, struct bitslice addr, struct bitslice Rt) {}
static INLINE tdis_ret P(t_adrlabel_addr_unk_Rd_1_tADR)(struct bitslice ctx, struct bitslice addr, struct bitslice Rd) {}
-static INLINE tdis_ret P(t_bcctarget_target_B_1_tBcc)(struct bitslice ctx, struct bitslice target) {}
+static INLINE tdis_ret P(t_bcctarget_target_pred_p_B_1_tBcc)(struct bitslice ctx, struct bitslice target, struct bitslice p) {}
static INLINE tdis_ret P(t_brtarget_target_B_1_tB)(struct bitslice ctx, struct bitslice target) {}
static INLINE tdis_ret P(t_cbtarget_target_B_2_tCBNZ)(struct bitslice ctx, struct bitslice target) {}
static INLINE tdis_ret P(unk_Rdn_1_tADDrSP)(struct bitslice ctx, struct bitslice Rdn) {}
diff --git a/generated/generic-dis-thumb2.inc.h b/generated/generic-dis-thumb2.inc.h
index 6cad07c..b685f0d 100644
--- a/generated/generic-dis-thumb2.inc.h
+++ b/generated/generic-dis-thumb2.inc.h
@@ -1,5 +1,5 @@
/* Generated code; do not edit!
- generated by tables/gen.js from imaon2 '2b8112204067abe3d0643e23c2486656841ecafe'
+ generated by tables/gen.js from imaon2 '2b8112204067abe3d0643e23c2486656841ecafe-dirty'
https://github.com/comex/imaon2
arguments: '--gen-hook-disassembler -n _thumb2 --dis-pattern=P(XXX) out/out-ARM.json'
(fair warning: at present the main (Rust) code in that repository is barely
@@ -16,7 +16,7 @@
/* GPRnopc_Rn_rGPR_Rm_unk_Rd_1_t2ADDrr: t2ADDrr */
/* t2adrlabel_addr_unk_Rd_1_t2ADR: t2ADR */
/* uncondbrtarget_target_B_1_t2B: t2B */
-/* brtarget_target_B_1_t2Bcc: t2Bcc */
+/* brtarget_target_pred_p_B_1_t2Bcc: t2Bcc */
/* addr_offset_none_addr_unk_Rt_11_t2LDA: t2LDA, t2LDAB, t2LDAEX, t2LDAEXB, t2LDAEXD, t2LDAEXH, t2LDAH, t2LDRD_POST, t2LDREXB, t2LDREXD, t2LDREXH */
/* addr_offset_none_addr_4_t2LDC2L_OPTION: t2LDC2L_OPTION, t2LDC2_OPTION, t2LDCL_OPTION, t2LDC_OPTION */
/* addr_offset_none_addr_postidx_imm8s4_offset_4_t2LDC2L_POST: t2LDC2L_POST, t2LDC2_POST, t2LDCL_POST, t2LDC_POST */
@@ -82,9 +82,10 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- insn_brtarget_target_B_1_t2Bcc:;
+ insn_brtarget_target_pred_p_B_1_t2Bcc:;
struct bitslice target = {.nruns = 5, .runs = (struct bitslice_run[]) {{0,1,11}, {11,19,1}, {13,18,1}, {16,12,6}, {26,20,1}}};
- return P(brtarget_target_B_1_t2Bcc)(ctx, target); /* 0xf0008000 | 0x07ff2fff */
+ struct bitslice p = {.nruns = 1, .runs = (struct bitslice_run[]) {{22,0,4}}};
+ return P(brtarget_target_pred_p_B_1_t2Bcc)(ctx, target, p); /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -185,7 +186,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -235,7 +236,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -287,7 +288,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -328,7 +329,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -380,7 +381,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -431,7 +432,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -499,7 +500,7 @@
case 8:
case 10: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -592,7 +593,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -804,7 +805,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -942,7 +943,7 @@
case 8:
case 10: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -1068,7 +1069,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -1119,7 +1120,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -1185,7 +1186,7 @@
case 8:
case 10: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -1292,7 +1293,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -1365,7 +1366,7 @@
case 8:
case 10: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -1459,7 +1460,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -1612,7 +1613,7 @@
case 8:
case 10: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -1724,7 +1725,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -1781,7 +1782,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -1886,7 +1887,7 @@
case 8:
case 10: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2034,7 +2035,7 @@
case 8:
case 10: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2158,7 +2159,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2223,7 +2224,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2276,7 +2277,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2317,7 +2318,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2383,7 +2384,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2443,7 +2444,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2502,7 +2503,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2546,7 +2547,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2603,7 +2604,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2659,7 +2660,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2702,7 +2703,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2744,7 +2745,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2791,7 +2792,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2869,7 +2870,7 @@
switch ((op >> 27) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2910,7 +2911,7 @@
switch ((op >> 12) & 0x1) {
case 0: {
if ((op & 0xf800d000) == 0xf0008000) {
- goto insn_brtarget_target_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
+ goto insn_brtarget_target_pred_p_B_1_t2Bcc; /* 0xf0008000 | 0x07ff2fff */
} else {
return P(unidentified)(ctx);
}
@@ -2989,7 +2990,7 @@ static INLINE tdis_ret P(addrmode5_addr_8_VLDRD)(struct bitslice ctx, struct bit
static INLINE tdis_ret P(addrmode5_addr_S_4_t2STC2L_OFFSET)(struct bitslice ctx, struct bitslice addr) {}
static INLINE tdis_ret P(addrmode5_pre_addr_4_t2LDC2L_PRE)(struct bitslice ctx, struct bitslice addr) {}
static INLINE tdis_ret P(addrmode5_pre_addr_S_4_t2STC2L_PRE)(struct bitslice ctx, struct bitslice addr) {}
-static INLINE tdis_ret P(brtarget_target_B_1_t2Bcc)(struct bitslice ctx, struct bitslice target) {}
+static INLINE tdis_ret P(brtarget_target_pred_p_B_1_t2Bcc)(struct bitslice ctx, struct bitslice target, struct bitslice p) {}
static INLINE tdis_ret P(rGPR_Rt_addr_offset_none_Rn_t2am_imm8_offset_offset_S_2_t2STRB_POST)(struct bitslice ctx, struct bitslice offset, struct bitslice Rt, struct bitslice Rn) {}
static INLINE tdis_ret P(rGPR_Rt_addr_offset_none_addr_S_4_t2STL)(struct bitslice ctx, struct bitslice Rt, struct bitslice addr) {}
static INLINE tdis_ret P(rGPR_Rt_addr_offset_none_addr_unk_Rd_S_7_t2STLEX)(struct bitslice ctx, struct bitslice Rd, struct bitslice Rt, struct bitslice addr) {}