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Diffstat (limited to 'include/kernel')
-rw-r--r--include/kernel/kernel/cpu.h68
1 files changed, 38 insertions, 30 deletions
diff --git a/include/kernel/kernel/cpu.h b/include/kernel/kernel/cpu.h
index ca9e263..b3b2603 100644
--- a/include/kernel/kernel/cpu.h
+++ b/include/kernel/kernel/cpu.h
@@ -12,29 +12,32 @@ extern "C" {
*
* @param state The state
*/
-#define ENTER_SYSCALL(state) do { \
- asm volatile ("mrc p15, 0, %0, c13, c0, 3" : "=r" (state)); \
- asm volatile ("mcr p15, 0, %0, c13, c0, 3" :: "r" (state << 16) : "memory"); \
-} while(0)
+#define ENTER_SYSCALL(state) \
+ do { \
+ asm volatile ("mrc p15, 0, %0, c13, c0, 3" : "=r" (state)); \
+ asm volatile ("mcr p15, 0, %0, c13, c0, 3" :: "r" (state << 16) : "memory"); \
+ } while(0)
/**
* @brief Call this when existing a syscall
*
* @param state The state
*/
-#define EXIT_SYSCALL(state) do { \
- asm volatile ("mcr p15, 0, %0, c13, c0, 3" :: "r" (state) : "memory"); \
-} while (0)
+#define EXIT_SYSCALL(state) \
+ do { \
+ asm volatile ("mcr p15, 0, %0, c13, c0, 3" :: "r" (state) : "memory"); \
+ } while (0)
/**
* @brief Save process context
*
* @param context The context
*/
-static inline void sceKernelCpuSaveContext(int context[3]) {
- asm ("mrc p15, 0, %0, c2, c0, 1" : "=r" (context[0]));
- asm ("mrc p15, 0, %0, c3, c0, 0" : "=r" (context[1]));
- asm ("mrc p15, 0, %0, c13, c0, 1" : "=r" (context[2]));
+static inline void sceKernelCpuSaveContext(int context[3])
+{
+ asm ("mrc p15, 0, %0, c2, c0, 1" : "=r" (context[0]));
+ asm ("mrc p15, 0, %0, c3, c0, 0" : "=r" (context[1]));
+ asm ("mrc p15, 0, %0, c13, c0, 1" : "=r" (context[2]));
}
/**
@@ -42,28 +45,33 @@ static inline void sceKernelCpuSaveContext(int context[3]) {
*
* @param context The context, can be from ::sceKernelGetPidContext
*/
-static inline void sceKernelCpuRestoreContext(int context[3]) {
- int cpsr;
- int tmp;
-
- asm volatile ("mrs %0, cpsr" : "=r" (cpsr));
- if (!(cpsr & 0x80)) {
- asm volatile ("cpsid i" ::: "memory");
- }
- asm volatile ("mrc p15, 0, %0, c13, c0, 1" : "=r" (tmp));
- tmp = (tmp & 0xFFFFFF00) | context[2];
- asm volatile ("mcr p15, 0, %0, c13, c0, 1" :: "r" (0));
- asm volatile ("isb" ::: "memory");
- asm volatile ("mcr p15, 0, %0, c2, c0, 1" :: "r" (context[0] | 0x4A));
- asm volatile ("isb" ::: "memory");
- asm volatile ("mcr p15, 0, %0, c13, c0, 1" :: "r" (tmp));
- asm volatile ("mcr p15, 0, %0, c3, c0, 0" :: "r" (context[1] & 0x55555555));
- if (!(cpsr & 0x80)) {
- asm volatile ("cpsie i" ::: "memory");
- }
+static inline void sceKernelCpuRestoreContext(int context[3])
+{
+ int cpsr, tmp;
+
+ asm volatile ("mrs %0, cpsr" : "=r" (cpsr));
+ if (!(cpsr & 0x80))
+ asm volatile ("cpsid i" ::: "memory");
+ asm volatile ("mrc p15, 0, %0, c13, c0, 1" : "=r" (tmp));
+ tmp = (tmp & 0xFFFFFF00) | context[2];
+ asm volatile ("mcr p15, 0, %0, c13, c0, 1" :: "r" (0));
+ asm volatile ("isb" ::: "memory");
+ asm volatile ("mcr p15, 0, %0, c2, c0, 1" :: "r" (context[0] | 0x4A));
+ asm volatile ("isb" ::: "memory");
+ asm volatile ("mcr p15, 0, %0, c13, c0, 1" :: "r" (tmp));
+ asm volatile ("mcr p15, 0, %0, c3, c0, 0" :: "r" (context[1] & 0x55555555));
+ if (!(cpsr & 0x80))
+ asm volatile ("cpsie i" ::: "memory");
}
/**
+ * @brief Returns the CPU ID of the calling processor
+ *
+ * @return The CPU ID
+ */
+int sceKernelCpuGetCpuId(void);
+
+/**
* @brief Disabled interrupts
*
* @return Interrupt masks before disabling