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-rw-r--r--lib/arm/assemble.h80
-rw-r--r--lib/arm/jump-patch.h18
-rw-r--r--lib/arm/misc.h7
-rw-r--r--lib/arm/transform-dis-arm-multi.inc.h121
-rw-r--r--lib/arm64/assemble.h53
-rw-r--r--lib/arm64/jump-patch.h19
-rw-r--r--lib/arm64/misc.h1
-rw-r--r--lib/arm64/transform-dis-arm64.inc.h49
8 files changed, 209 insertions, 139 deletions
diff --git a/lib/arm/assemble.h b/lib/arm/assemble.h
new file mode 100644
index 0000000..90f91c9
--- /dev/null
+++ b/lib/arm/assemble.h
@@ -0,0 +1,80 @@
+#pragma once
+#include "dis.h"
+
+static inline void PUSHone(void **codep, int Rt) {
+ if (codep->arch.pc_low_bit)
+ op32(codep, 0x0d04f84d | Rt << 28);
+ else
+ op32(codep, 0xe52d0004 | Rt << 12);
+}
+
+static inline void POPone(void **codep, int Rt) {
+ if (codep->arch.pc_low_bit)
+ op32(codep, 0x0b04f85d | Rt << 28);
+ else
+ op32(codep, 0xe49d0004 | Rt << 12);
+}
+
+static inline void POPmulti(void **codep, uint16_t mask) {
+ if (codep->arch.pc_low_bit)
+ op32(codep, 0x0000e8bd | mask << 16);
+ else
+ op32(codep, 0xe8bd0000 | mask);
+}
+
+static inline void MOVW_MOVT(void **codep, int Rd, uint32_t val) {
+ uint16_t hi = val >> 16, lo = (uint16_t) val;
+ if (codep->arch.pc_low_bit) {
+ op32(codep, 0x0000f240 | Rd << 24 | lo >> 12 | (lo >> 11 & 1) << 10 |
+ (lo >> 8 & 7) << 28 | (lo & 0xff) << 16);
+ op32(codep, 0x0000f2c0 | Rd << 24 | hi >> 12 | (hi >> 11 & 1) << 10 |
+ (hi >> 8 & 7) << 28 | (hi & 0xff) << 16);
+
+ } else {
+ op32(codep, 0xe3000000 | Rd << 12 | (lo >> 12) << 16 | (lo & 0xfff));
+ op32(codep, 0xe3400000 | Rd << 12 | (hi >> 12) << 16 | (hi & 0xfff));
+ }
+
+}
+
+static inline void STRri(void **codep, int Rt, int Rn, uint32_t off) {
+ if (codep->arch.pc_low_bit)
+ op32(codep, 0x0000f8c0 | Rn | Rt << 28 | off << 16);
+ else
+ op32(codep, 0xe4800000 | Rn << 16 | Rt << 12 | off);
+}
+
+static inline void LDRxi(void **codep, int Rt, int Rn, uint32_t off,
+ enum pcrel_load_mode load_mode) {
+ if (codep->arch.pc_low_bit) {
+ int subop, sign;
+ switch (load_mode) {
+ case PLM_U8: subop = 0; sign = 0; break;
+ case PLM_S8: subop = 0; sign = 1; break;
+ case PLM_U16: subop = 1; sign = 0; break;
+ case PLM_S16: subop = 1; sign = 1; break;
+ case PLM_U32: subop = 2; sign = 0; break;
+ default: __builtin_abort();
+ }
+ op32(codep, 0x0000f890 | Rn | Rt << 28 | subop << 5 | sign << 8 | off << 16);
+ } else {
+ int is_byte, subop, not_ldrd;
+ switch (load_mode) {
+ case PLM_U8: is_byte = 1; goto type1;
+ case PLM_S8: subop = 13; not_ldrd = 1; goto type2;
+ case PLM_U16: subop = 11; not_ldrd = 1; goto type2;
+ case PLM_S16: subop = 15; not_ldrd = 1; goto type2;
+ case PLM_U32: is_byte = 0; goto type1;
+ case PLM_U128: subop = 13; not_ldrd = 0; goto type2;
+ type1:
+ op32(codep, 0xe5900000 | Rn << 16 | Rt << 12 | off);
+ break;
+ type2:
+ op32(codep, 0xe1c00000 | Rn << 16 | Rt << 12 | subop << 4 |
+ (off & 0xf) | (off & 0xf0) << 4 | not_ldrd << 20);
+ break;
+ default:
+ __builtin_abort();
+ }
+ }
+}
diff --git a/lib/arm/jump-patch.h b/lib/arm/jump-patch.h
new file mode 100644
index 0000000..b19e90f
--- /dev/null
+++ b/lib/arm/jump-patch.h
@@ -0,0 +1,18 @@
+#pragma once
+#include "dis.h"
+#define MAX_JUMP_PATCH_SIZE 8
+#define MAX_REWRITTEN_SIZE (12 * 4) /* actually should be less */
+
+static inline int jump_patch_size(uintptr_t pc, uintptr_t dpc,
+ struct arch_dis_ctx arch) {
+ return 8;
+}
+
+static inline void make_jump_patch(void **codep, uintptr_t pc, uintptr_t dpc,
+ struct arch_dis_ctx arch) {
+ if (arch.pc_low_bit)
+ op32(codep, 0xf000f8df);
+ else
+ op32(codep, 0xe51ff004);
+ op32(codep, (uint32_t) pc);
+}
diff --git a/lib/arm/misc.h b/lib/arm/misc.h
index 047be2d..3dc9633 100644
--- a/lib/arm/misc.h
+++ b/lib/arm/misc.h
@@ -1,6 +1,7 @@
#pragma once
#define TARGET_DIS_SUPPORTED
#define TARGET_DIS_HEADER "arm/dis-arm-multi.inc.h"
+#define TARGET_JUMP_PATCH_HDR "arm/jump-patch.h"
#define TARGET_TRANSFORM_DIS_HEADER "arm/transform-dis-arm-multi.inc.h"
#define MIN_INSN_SIZE 2
struct arch_dis_ctx {
@@ -8,3 +9,9 @@ struct arch_dis_ctx {
bool pc_low_bit;
};
enum { IS_LDRD_STRD = 1 << 16 };
+
+#define JUMP_PATCH_SIZE 8
+#define MAX_REWRITTEN_SIZE (12 * 4) /* actually should be less */
+static inline bool can_reach_with_jump_patch(uintptr_t pc, uintptr_t dpc) {
+ return true;
+}
diff --git a/lib/arm/transform-dis-arm-multi.inc.h b/lib/arm/transform-dis-arm-multi.inc.h
index f1b9b80..001e613 100644
--- a/lib/arm/transform-dis-arm-multi.inc.h
+++ b/lib/arm/transform-dis-arm-multi.inc.h
@@ -1,80 +1,4 @@
-static inline void PUSHone(struct transform_dis_ctx *ctx, int Rt) {
- if (ctx->arch.pc_low_bit)
- op32(ctx, 0x0d04f84d | Rt << 28);
- else
- op32(ctx, 0xe52d0004 | Rt << 12);
-}
-
-static inline void POPone(struct transform_dis_ctx *ctx, int Rt) {
- if (ctx->arch.pc_low_bit)
- op32(ctx, 0x0b04f85d | Rt << 28);
- else
- op32(ctx, 0xe49d0004 | Rt << 12);
-}
-
-static inline void POPmulti(struct transform_dis_ctx *ctx, uint16_t mask) {
- if (ctx->arch.pc_low_bit)
- op32(ctx, 0x0000e8bd | mask << 16);
- else
- op32(ctx, 0xe8bd0000 | mask);
-}
-
-static inline void MOVW_MOVT(struct transform_dis_ctx *ctx, int Rd, uint32_t val) {
- uint16_t hi = val >> 16, lo = (uint16_t) val;
- if (ctx->arch.pc_low_bit) {
- op32(ctx, 0x0000f240 | Rd << 24 | lo >> 12 | (lo >> 11 & 1) << 10 |
- (lo >> 8 & 7) << 28 | (lo & 0xff) << 16);
- op32(ctx, 0x0000f2c0 | Rd << 24 | hi >> 12 | (hi >> 11 & 1) << 10 |
- (hi >> 8 & 7) << 28 | (hi & 0xff) << 16);
-
- } else {
- op32(ctx, 0xe3000000 | Rd << 12 | (lo >> 12) << 16 | (lo & 0xfff));
- op32(ctx, 0xe3400000 | Rd << 12 | (hi >> 12) << 16 | (hi & 0xfff));
- }
-
-}
-
-static inline void STRri(struct transform_dis_ctx *ctx, int Rt, int Rn, uint32_t off) {
- if (ctx->arch.pc_low_bit)
- op32(ctx, 0x0000f8c0 | Rn | Rt << 28 | off << 16);
- else
- op32(ctx, 0xe4800000 | Rn << 16 | Rt << 12 | off);
-}
-
-static inline void LDRxi(struct transform_dis_ctx *ctx, int Rt, int Rn, uint32_t off,
- enum pcrel_load_mode load_mode) {
- if (ctx->arch.pc_low_bit) {
- int subop, sign;
- switch (load_mode) {
- case PLM_U8: subop = 0; sign = 0; break;
- case PLM_S8: subop = 0; sign = 1; break;
- case PLM_U16: subop = 1; sign = 0; break;
- case PLM_S16: subop = 1; sign = 1; break;
- case PLM_U32: subop = 2; sign = 0; break;
- default: __builtin_abort();
- }
- op32(ctx, 0x0000f890 | Rn | Rt << 28 | subop << 5 | sign << 8 | off << 16);
- } else {
- int is_byte, subop, not_ldrd;
- switch (load_mode) {
- case PLM_U8: is_byte = 1; goto type1;
- case PLM_S8: subop = 13; not_ldrd = 1; goto type2;
- case PLM_U16: subop = 11; not_ldrd = 1; goto type2;
- case PLM_S16: subop = 15; not_ldrd = 1; goto type2;
- case PLM_U32: is_byte = 0; goto type1;
- case PLM_U128: subop = 13; not_ldrd = 0; goto type2;
- type1:
- op32(ctx, 0xe5900000 | Rn << 16 | Rt << 12 | off);
- break;
- type2:
- op32(ctx, 0xe1c00000 | Rn << 16 | Rt << 12 | subop << 4 |
- (off & 0xf) | (off & 0xf0) << 4 | not_ldrd << 20);
- break;
- default:
- __builtin_abort();
- }
- }
-}
+#include "arm/assemble.h"
static NOINLINE UNUSED void transform_dis_data(struct transform_dis_ctx *ctx,
unsigned o0, unsigned o1, unsigned o2, unsigned o3, unsigned out_mask) {
@@ -91,7 +15,7 @@ static NOINLINE UNUSED void transform_dis_data(struct transform_dis_ctx *ctx,
newval[2] = o2;
newval[3] = o3;
- void **rpp = ctx->rewritten_ptr_ptr;
+ void **codep = ctx->rewritten_ptr_ptr;
/* A few cases:
* 1. Move to PC that does not read PC. Probably fine.
@@ -130,32 +54,33 @@ static NOINLINE UNUSED void transform_dis_data(struct transform_dis_ctx *ctx,
if (in_regs & 1 << 15)
return; /* case 1 */
/* case 2 */
- PUSHone(ctx, scratch);
- PUSHone(ctx, scratch);
- MOVW_MOVT(ctx, scratch, pc);
+ PUSHone(codep, scratch);
+ PUSHone(codep, scratch);
+ MOVW_MOVT(codep, scratch, pc);
for (int i = 0; i < 4; i++)
if (newval[i] == 15)
newval[i] = scratch;
- ctx->write_newop_here = *rpp; *rpp += ctx->op_size;
- STRri(ctx, scratch, 13, 4);
- POPmulti(ctx, 1 << scratch | 1 << 15);
+ ctx->write_newop_here = *codep; *codep += ctx->op_size;
+ STRri(codep, scratch, 13, 4);
+ POPmulti(codep, 1 << scratch | 1 << 15);
+ transform_dis_ret(ctx);
} else {
if (out_reg != -1 && !(in_regs & 1 << out_reg)) {
/* case 3 - ignore scratch */
- MOVW_MOVT(ctx, out_reg, pc);
+ MOVW_MOVT(codep, out_reg, pc);
for (int i = 0; i < 4; i++)
if (newval[i] == 15)
newval[i] = out_reg;
- ctx->write_newop_here = *rpp; *rpp += ctx->op_size;
+ ctx->write_newop_here = *codep; *codep += ctx->op_size;
} else {
/* case 4 */
- PUSHone(ctx, scratch);
- MOVW_MOVT(ctx, scratch, pc);
+ PUSHone(codep, scratch);
+ MOVW_MOVT(codep, scratch, pc);
for (int i = 0; i < 4; i++)
if (newval[i] == 15)
newval[i] = scratch;
ctx->write_newop_here = *rpp; *rpp += ctx->op_size;
- POPone(ctx, scratch);
+ POPone(codep, scratch);
}
}
ctx->modify = true;
@@ -172,18 +97,20 @@ static NOINLINE UNUSED void transform_dis_pcrel(struct transform_dis_ctx *ctx,
(void *) dpc, reg, load_mode);
#endif
ctx->write_newop_here = NULL;
+ void **codep = ctx->rewritten_ptr_ptr;
if (reg == 15) {
int scratch = 0;
- PUSHone(ctx, scratch);
- PUSHone(ctx, scratch);
- MOVW_MOVT(ctx, scratch, dpc);
+ PUSHone(codep, scratch);
+ PUSHone(codep, scratch);
+ MOVW_MOVT(codep, scratch, dpc);
if (load_mode != PLM_ADR)
- LDRxi(ctx, scratch, scratch, 0, load_mode);
- STRri(ctx, scratch, 13, 4);
- POPmulti(ctx, 1 << scratch | 1 << 15);
+ LDRxi(codep, scratch, scratch, 0, load_mode);
+ STRri(codep, scratch, 13, 4);
+ POPmulti(codep, 1 << scratch | 1 << 15);
+ transform_dis_ret(codep);
} else {
- MOVW_MOVT(ctx, reg, dpc);
+ MOVW_MOVT(codep, reg, dpc);
if (load_mode != PLM_ADR)
- LDRxi(ctx, reg, reg, 0, load_mode);
+ LDRxi(codep, reg, reg, 0, load_mode);
}
}
diff --git a/lib/arm64/assemble.h b/lib/arm64/assemble.h
new file mode 100644
index 0000000..00797e9
--- /dev/null
+++ b/lib/arm64/assemble.h
@@ -0,0 +1,53 @@
+#pragma once
+#include "dis.h"
+static inline void MOVi64(void **codep, int Rd, uint64_t val) {
+ int shift_nybbles = 0;
+ do {
+ int k = shift_nybbles != 0 ? 1 : 0;
+ op32(codep, 0x69400000 | k << 28 | Rd | (val & 0xffff) << 4 |
+ shift_nybbles << 20);
+ shift_nybbles++;
+ val >>= 16;
+ } while(val);
+}
+
+static inline void LDRxi(void **codep, int Rt, int Rn, uint32_t off,
+ bool regsize_64, enum pcrel_load_mode load_mode) {
+ int size, opc;
+ bool sign, simd;
+ switch (load_mode) {
+ case PLM_U8: size = 0; sign = false; simd = false; break;
+ case PLM_S8: size = 0; sign = true; simd = false; break;
+ case PLM_U16: size = 1; sign = false; simd = false; break;
+ case PLM_S16: size = 1; sign = true; simd = false; break;
+ case PLM_U32: size = 2; sign = false; simd = false; break;
+ case PLM_S32: size = 2; sign = true; simd = false; break;
+ case PLM_U64: size = 3; sign = false; simd = false; break;
+ case PLM_U32_SIMD: size = 2; opc = 1; simd = true; break;
+ case PLM_U64_SIMD: size = 3; opc = 1; simd = true; break;
+ case PLM_U128_SIMD: size = 0; opc = 3; simd = true; break;
+ default: __builtin_abort();
+ }
+ if (simd) {
+ off /= 1 << (size | (opc & 1) << 2);
+ } else {
+ off /= 1 << size;
+ opc = sign ? (regsize_64 ? 2 : 3) : 1;
+ }
+ op32(codep, 0x39000000 | Rt | Rn << 5 | off << 10 | opc << 22 | simd << 26 |
+ size << 30);
+}
+
+static inline void ADRP_ADD(void **codep, int reg, uint64_t pc, uint64_t dpc) {
+ uintptr_t diff = (dpc & ~0xfff) - (pc & ~0xfff);
+ /* ADRP reg, dpc */
+ op32(codep, 0x90000000 | reg | (diff & 0x3000) << 17 | (diff & 0xffffc000) >> 8);
+ uint32_t lo = pc & 0xfff;
+ if (lo) {
+ /* ADD reg, reg, #lo */
+ op32(codep, 0x91000000 | reg | reg << 5 | lo << 10);
+ }
+ /* BR reg */
+ op32(codep, 0xd61f0000 | reg << 5);
+}
+
diff --git a/lib/arm64/jump-patch.h b/lib/arm64/jump-patch.h
new file mode 100644
index 0000000..f0f149f
--- /dev/null
+++ b/lib/arm64/jump-patch.h
@@ -0,0 +1,19 @@
+#pragma once
+#include "arm64/assemble.h"
+#define MAX_JUMP_PATCH_SIZE 12
+#define MAX_REWRITTEN_SIZE (7 * 2 * 4) /* also conservative */
+static inline int jump_patch_size(uintptr_t pc, uintptr_t dpc,
+ struct arch_dis_ctx arch) {
+ intptr_t diff = (dpc & ~0xfff) - (pc & ~0xfff);
+ if (!(diff >= -0x100000000 && diff < 0x100000000))
+ return -1;
+ else if (pc & 0xfff)
+ return 8;
+ else
+ return 12;
+}
+
+static inline void make_jump_patch(void **codep, uintptr_t pc, uintptr_t dpc,
+ struct arch_dis_ctx arch) {
+ ADRP_ADD(codep, 12 /* XXX */, pc, dpc);
+}
diff --git a/lib/arm64/misc.h b/lib/arm64/misc.h
index 672e1bd..c7fa5c9 100644
--- a/lib/arm64/misc.h
+++ b/lib/arm64/misc.h
@@ -1,6 +1,7 @@
#pragma once
#define TARGET_DIS_SUPPORTED
#define TARGET_DIS_HEADER "arm64/dis-arm64.inc.h"
+#define TARGET_JUMP_PATCH_HDR "arm64/jump-patch.h"
#define TARGET_TRANSFORM_DIS_HEADER "arm64/transform-dis-arm64.inc.h"
#define MIN_INSN_SIZE 4
struct arch_dis_ctx {};
diff --git a/lib/arm64/transform-dis-arm64.inc.h b/lib/arm64/transform-dis-arm64.inc.h
index c47971b..3710b73 100644
--- a/lib/arm64/transform-dis-arm64.inc.h
+++ b/lib/arm64/transform-dis-arm64.inc.h
@@ -1,52 +1,17 @@
-static inline void MOVi64(struct transform_dis_ctx *ctx, int Rd, uint64_t val) {
- int shift_nybbles = 0;
- do {
- int k = shift_nybbles != 0 ? 1 : 0;
- op32(ctx, 0x69400000 | k << 28 | Rd | (val & 0xffff) << 4 | shift_nybbles << 20);
- shift_nybbles++;
- val >>= 16;
- } while(val);
-}
-
-static inline void LDRxi(struct transform_dis_ctx *ctx, int Rt, int Rn, uint32_t off,
- bool regsize_64, enum pcrel_load_mode load_mode) {
- int size, opc;
- bool sign, simd;
- switch (load_mode) {
- case PLM_U8: size = 0; sign = false; simd = false; break;
- case PLM_S8: size = 0; sign = true; simd = false; break;
- case PLM_U16: size = 1; sign = false; simd = false; break;
- case PLM_S16: size = 1; sign = true; simd = false; break;
- case PLM_U32: size = 2; sign = false; simd = false; break;
- case PLM_S32: size = 2; sign = true; simd = false; break;
- case PLM_U64: size = 3; sign = false; simd = false; break;
- case PLM_U32_SIMD: size = 2; opc = 1; simd = true; break;
- case PLM_U64_SIMD: size = 3; opc = 1; simd = true; break;
- case PLM_U128_SIMD: size = 0; opc = 3; simd = true; break;
- default: __builtin_abort();
- }
- if (simd) {
- off /= 1 << (size | (opc & 1) << 2);
- } else {
- off /= 1 << size;
- opc = sign ? (regsize_64 ? 2 : 3) : 1;
- }
- op32(ctx, 0x39000000 | Rt | Rn << 5 | off << 10 | opc << 22 | simd << 26 | size << 30);
-}
-
static NOINLINE UNUSED void transform_dis_pcrel(struct transform_dis_ctx *ctx,
uintptr_t dpc, unsigned reg, enum pcrel_load_mode load_mode) {
ctx->write_newop_here = NULL;
+ void **codep = ctx->rewritten_ptr_ptr;
if (load_mode >= PLM_U32_SIMD) {
/* use x0 as scratch */
- op32(ctx, 0xf81f0fe0); /* str x0, [sp, #-0x10]! */
- MOVi64(ctx, 0, dpc);
- LDRxi(ctx, reg, 0, 0, true, load_mode);
- op32(ctx, 0xf84107e0); /* ldr x0, [sp], #0x10 */
+ op32(codep, 0xf81f0fe0); /* str x0, [sp, #-0x10]! */
+ MOVi64(codep, 0, dpc);
+ LDRxi(codep, reg, 0, 0, true, load_mode);
+ op32(codep, 0xf84107e0); /* ldr x0, [sp], #0x10 */
} else {
- MOVi64(ctx, reg, dpc);
- LDRxi(ctx, reg, reg, 0, true, load_mode);
+ MOVi64(codep, reg, dpc);
+ LDRxi(codep, reg, reg, 0, true, load_mode);
}
}
Copyright (C) 2019-2021 Reiko Asakura. All Rights Reserved.